A growing number of electromigration tests are aimed at high current applications, where the Device Under Test (DUT) has very low resistance. The most typical example is a solder bump contact (“solder-bump”), used in a variety of packages of semiconductors chips. In such tests, stress currents as high as 2.0 Amperes are often required.
Once the DUT sustains significant damage due to electromigation, its resistance and dissipated power may increase dramatically to the point where the thermal damage can be catastrophic. At first look this should not be an issue, as the DUT has already gone through the test; however, such a thermal damage can make post-test failure analysis practically impossible.
A common approach is to disconnect the stressing current from the DUT, once the necessary level of degradation is reached. Unfortunately, electromigration testers often cannot act sufficiently fast to prevent catastrophic damage to the DUT before such action is taken. Another idea is to limit the compliance voltage of the stressing current source to the point where the voltage drop across the DUT is limited. For example, the limit may be set to a low enough level not to obscure the necessary post-test failure analysis, and yet high enough to sustain sufficient degradation. This idea, while valid in principle, is probably not very practical, considering that voltage drops across stressed solder-bumps are often 0.1 Volt or less. Also, power supplies with very low voltage and high output current are both uncommon and difficult to make.
In this patent application, we describe a novel way to address and resolve this problem, with minimal or no negative impact on all other test parameters and features. Furthermore, it provides a new option to enhance DUT capacity, with little if any additional constraints.